Kinetic Plasma Simulation Algorithms on New Computing Architectures Intern

Kinetic simulations which study the evolution of plasmas under the influence of electromagnetic fields play a critical role in plasma science and development of new and exciting technologies such as spacecraft propulsion and fusion energy. The PIC algorithm is commonly used to study kinetic plasmas; however these simulations are extremely computationally expensive and must therefore be designed to take advantage of modern supercomputer architectures so that simulations can finish in realistic time frames.

With the slowing of Moore’s law, hardware manufacturers are developing increasingly heterogeneous computer architectures which offer opportunities, but also challenges for computational physicists, including those who design PIC software. A common example of this includes the increasing use of GPUs in high-performance computing (HPC), which offer performance improvements via a massively parallel approach. With the growth in use for AI, these chips have also introduced “tensor” cores, which are often lower-precision (less accurate) but can perform calculations far quicker than regular cores. These GPUs are also being more closely coupled with CPUs in what are called “superchips” such as the NVIDIA Grace-Hopper architecture, which offers significantly faster memory transfer speeds between the two chip types. More exotic architectures include Field Programmable Gate Arrays (FPGAs) which allow the user to actually program the design of the chip, optimizing it for their specific application.

The goal of this internship will be to test and optimize core algorithms from the PIC method for these different architectures. The intern will learn and program the basic algorithms of PIC in Python or a compiler level language such as C/C++. They will then run this code on advanced computer chips available at PPPL and optimize the code to take advantage of these unique architectures. The outcome should be a clear comparison between the different chips in terms of performance and ease of programming.

Justification: The purpose of this internship is to explore new supercomputing chips and architectures for improving the performance of algorithms critical for simulations of plasma physics. The intern will work with the PI and co-PI to learn the basics of algorithms used in the particle-in-cell (PIC) method and optimize them on different GPU cores as well as FPGA chips. The outcomes will be a report and/or conference presentation which will highlight performance improvements and pros/cons of each chip architecture.

A proud U.S. Department of Energy National Laboratory managed by Princeton University, Princeton Plasma Physics Laboratory (PPPL) is a longstanding leader in the science and innovation behind the development of fusion energy — a clean, safe, and virtually limitless energy source. With an eye on the future and in response to national priorities, PPPL also has begun a strategic shift from a singular focus on fusion energy to a multi-focus approach that includes microelectronics, quantum information science, and sustainability science. Whether it be through science, engineering, technology or professional services, every team member has an opportunity to make their mark on our world. PPPL aims to attract and support people with a rich variety of backgrounds, interests, experiences, and cultural viewpoints. We are committed to equity, diversity, inclusion and accessibility and believe that each member of our team contributes to our scientific mission in their own unique way. Come join us!

Core Duties

• Using Python, program basic algorithms used in the particle-in-cell method and verify these implementations by testing against basic plasma physics behaviour.
• Port these algorithms to run on GPU cores, relying on lower-level programming languages if needed.
• Port these algorithms to run on GPU tensor cores, relying on lower-level programming languages if needed.
• Test memory bandwidth improvements and limitations for PIC algorithms on the NVIDIA Grace-Hopper superchip architecture.
• Port these algorithms to run on Intel Alterra FPGA’s, relying on lower-level programming languages if needed.
• Produce a report which compares the performance and ease of programming for the algorithms on each of the above computer chips.
• Time and funding permitting, prepare an abstract or paper to submit to an upcoming scientific computing conference.

Education and Experience

• Undergraduate Student

Knowledge, Skills and Abilities

• Pursuing an undergraduate degree in computer science, electrical engineering, or related studies (other science or engineering degrees are acceptable).
• Familiarity with a low-level programming language such as C/C++/C#.
• Familiarity with Python, Numpy and SciPy.
• Familiarity with computer architecture (difference between a CPU and GPU, memory hierarchies and bandwidth etc.).
• Familiarity with CUDA GPU programming.
• Knowledge of numerical algorithms is desirable although not essential.
• Basic knowledge of plasma physics is desirable although not essential.

Working Conditions

• Hybrid

Princeton University is an Equal Opportunity/Affirmative Action Employer and all qualified applicants will receive consideration for employment without regard to age, race, color, religion, sex, sexual orientation, gender identity or expression, national origin, disability status, protected veteran status, or any other characteristic protected by law. KNOW YOUR RIGHTS

Please be aware that the Department of Energy (DOE) prohibits DOE employees and contractors from participation in certain foreign government talent recruitment programs. All PPPL employees are required to disclose any participation in a foreign government talent recruitment program and may be required to withdraw from such programs to remain employed under the DOE Contract.

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